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Computer-Aided Design of Integrated Circuits and Systems, Tập 32, Số 11, 2013
Mục lục:
DòngNội dung
1LAYGEN II—Automatic Layout Generation of Analog Integrated Circuits / Ricardo Martins, Nuno Lourenco, and Nuno Horta
2An ILP-based Routing Algorithm forPin-Constrained EWOD Chips With Obstacle Avoidance / Jia-Wen Chang, Sheng-Han Yeh, Tsung-Wei Huang, and Tsung-Yi Ho,
3Data-Driven Mapping Using Local Patterns / Gayatri Mehta and others
4Grid Size Adapted Multistep Methods for High Q Oscillators / Hans Georg Brachtendorf and Kai Bittner
5Chip/Package Mechanical Stress Impact on 3-DIC Reliability and Mobility Variations / Moongon Jung, David Z. Pan and Sung Kyu Lim
6ECO Optimization Using Metal-Configurable Gate-Array Spare Cells / Hua-Yu Chang, Iris Hui-Ru Jiang and Yao-Wen Chang
7Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical–Thermal–Mechanical Coupling / Sai Manoj P. D and others
8Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint / Jinho Lee and others
9Input Test Data Compression Based on the Reuse of Parts of Dictionary Entries: Static and Dynamic Approaches / Panagiotis Sismanoglou and Dimitris Nikolos
10Test Time Reduction in EDT Bandwidth Management for SoC Designs / Jakub Janicki and others
11Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviors / Chandan Karfa and others